Multiple Reference Clock Generator
Multiple Reference Clock Generator
Multiple Reference Clock Generator
Motorola Solutions’ Multiple Reference Clock Generator (MRCG) technology provides real-time generation and control of multiple clocks running at different frequencies. The MRCG offers several advantages over traditional clock generation technologies, such as a Phase Locked Loop (PLL), by providing a pure digital clock generator with direct digital synthesis features not available in PLLs.
How It Works
The MRCG uses a proprietary, digital approach to frequency synthesis that is capable of Direct Digital Synthesizer (DDS) level of performance. The MRCG replaces the digital-to-analog converter used in traditional DDS with a digital-to-time converter to generate square wave or two-state signals. The result is edge-defined direct digital signal synthesis at a much lower power drain that can be instantaneously generated and reconfigured as needed.
Features and Benefits
- Frequency range from 2 MHz to 1 GHz
- Purely digital design portable to any semiconductor technology
- Ability to control frequency and edges of clock outputs “on-the-fly” via a Serial Programmable Interface (SPI)
- Ability to deskew on-chip and off-chip clocks for system level calibration.
- Deterministic, instant start/stop of clock outputs, as no “lock” period is required for clocks to stabilize
- Smaller area and lower power as compared to multiple PLLs
- Multiple outputs with time, phase, or frequency coherent properties
- Direct digital modulation in phase, frequency, and amplitude domains
- Reconfigurable clock spreading technologyReduced design/development cycle time
- Reduced design/development cycle time
Features and Benefits
- Frequency range from 2 MHz to 1 GHz
- Purely digital design portable to any semiconductor technology
- Ability to control frequency and edges of clock outputs “on-the-fly” via a Serial Programmable Interface (SPI)
- Ability to deskew on-chip and off-chip clocks for system level calibration.
- Deterministic, instant start/stop of clock outputs, as no “lock” period is required for clocks to stabilize
- Smaller area and lower power as compared to multiple PLLs
- Multiple outputs with time, phase, or frequency coherent properties
- Direct digital modulation in phase, frequency, and amplitude domains
- Reconfigurable clock spreading technologyReduced design/development cycle time
- Reduced design/development cycle time